FPGA Mezzanine Card (FMC) is a game-changer

 Posted on June 23, 2011  |  Jeff Johnson

If you’re a hardware developer, you know the problem:

  • My product integrates the FPGA and ADC on the one compact PCB, but now my customers want a higher-speed ADC, or a DAC, or both. Now I have to take on the risk of designing a whole new board to satisfy that demand.
  • I’m getting killed on repairs because the cost of my field-replacable-unit is too high. Having too many high-cost devices on the same board is just not economical.

If you’re an FPGA developer, you know the problem:

  • I want to interface a wide input stream to my FPGA, but my development board doesn’t offer that kind of connectivity.
  • I need to pass multiple MGT connections from one board to another and I’d like to do it with one connector.
  • And on and on and on…

The solution:

Expensive products need modular design to control the risk and create more adaptable products. FMC standard separates the FPGA from the IO (ADC/DAC/Ethernet/Optics/whatever) with a carrier to mezzanine card design.

The FPGA Mezzanine Card (FMC) standard solves these problems with a single 400-pin surface-mount connector and a standard for FMC carriers and daughter cards. The standard specifies the envelope of the FMCs and also their connections to the FMC connector in terms of which FMC pins connect to which pins of the FPGA. There are pins dedicated for MGTs, clocks and others for general IO.

Here’s what a standard FMC looks like. This is an 8-channel 250MSps analog-to-digital converter:

Xilinx has this to say about the benefits of FMC:

  • Data throughput: Individual signaling speeds up to 10 Gb/s are supported, with a potential overall bandwidth of 40 Gb/s between mezzanine and carrier card
  • Latency: Elimination of protocol overhead removes latency and ensures deterministic data delivery.
  • Design simplicity: Expertise in protocol standards such as PCI, PCI Express®, or Serial RapidIO is not required.
  • System overhead: Simplifying the system design reduces power consumption, IP core costs, engineering time, and material costs.
  • Design reuse: Whether using a custom in-house board design or a commercial-off-the-shelf (COTS) mezzanine or carrier card, the FMC standard promotes the ability to retarget existing FPGA/carrier card designs to a new I/O. All that is required is swapping out the FMC module and slightly adjusting the FPGA design.

As an enabler of FPGA based technologies and a means to reduce development costs, Xilinx obviously has a lot to gain from FMC. I think we should be seeing more FPGA based designs showing up in the near future.

Here are some companies that design FMCs and carriers:

Other groups and information:

How do I solder this thing?

I know a lot of you are DIY developers like me so I thought I’d mention a bit of the practical side of using these connectors. Unfortunately if you want to put together your own FMC, the connector itself is impossible to hand solder (I’d like to see someone prove me wrong though ;), so you will need a stencil, solder paste and an oven.