ML505-XUPV5

In the previous tutorial on using the SDK, we exported our base project from EDK to SDK and then we ran a simple software application that printed “Hello World” in the terminal window. In this tutorial, we will do something more useful than saying hello, instead we will illustrate the concept of communicating with a peripheral from C code running on the Microblaze. More specifically, we will read the DIP switch settings and display them on the terminal screen using printfs. Our C code will poll the switches constantly so that any change will be reflected in the terminal window.

In the previous tutorial titled Creating a project using Base System Builder, we used the Embedded Development Kit (EDK) to create a hardware design composed of IP cores and a Microblaze soft processor. In this tutorial, we will complete the design by writing a software application to run on the Microblaze processor. In version 13.1, this is done using the Software Development Kit (SDK) and it is no longer “doable” in the EDK. To keep things simple, we’ll start off with a “hello world” application and then move onto one that will communicate with our peripherals. Specifically, we will read the DIP switch settings and display them on the terminal screen using printfs.

For some reason, the Base System Builder in EDK doesn’t support the XUPV5 board so when making an EDK project for the XUPV5 we have to select the ML505 board and modify the project settings later. If you have not yet created an EDK project, you should read the previous post Creating a project using the Base System Builder, and then continue from these instructions.

What am I learning here?

In this post we’ll look at using the Base System Builder in EDK version 13.1. Specifically you’ll learn:

1. How to create an EDK project with the Base System Builder
2. How to add a software application to an EDK project
3. How to implement and test your design

Requirements

You will need the following :

• One ML505/ML506/ML507 or XUPV5 board (or actually any board supported by Xilinx).
• Xilinx ISE Design Suite 13.1 (including EDK)

Create the Basic Project

Follow these steps to create the basic project:

Overview

Your FPGA designs can be copied onto a compact flash card and loaded automatically when your ML50x/XUPV5 board is turned ON. The configuration DIP switch (SW3), located in the top left hand corner of the board, determines which design the FPGA is loaded with when the board is turned ON.

Before understanding how to use these switches, we must first take a look at how the flash disk contents are structured.

Instructions To run your designs from the flash disk, you need to first convert your bit files to System ACE files (.ace). One simple system for doing this is to copy all your bit files to one folder and use a batch file in that folder to perform the conversions from the command line.

1. To start, you should create a folder and copy your bit file(s) there (eg. “C:SysACE”).

2. If you are copying your bit files from the “implementation” folder of the EDK project, they will be named download.bit. You should rename them to something that is appropriate for the designs. For example, if my design is an Ethernet design, I might call it ethernet.bit.

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Instructions
If you want to download a bit file (.bit) to your FPGA without using ISE or EDK, you can use iMPACT directly from the command line.

1. To start, you should copy your bit file to a known folder (eg. “C:MyFolder”) and rename it to download.bit if it isn’t already called that.

2. Then you should create an iMPACT script file called download.cmd. The script file is just a text file that you can create with Wordpad and it must contain the following text:

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Tutorial Overview

In the last tutorial we implemented the embedded Tri-mode Ethernet MAC and tested it by looping back Ethernet packets and monitoring them with Wireshark. In this tutorial, we will again implement the EMAC but this time we will link it to an Aurora core, to implement an Aurora to Ethernet Bridge. With the bridge, we can link two PCs as shown in the diagram below.

To connect the EMAC and Aurora cores we have to use two FIFOs to cross clock domains. The EMAC has a user clock of 125MHz and a data interface of 8 bits, while the Aurora core will have a user clock of 62.5MHz and a data interface of 16 bits. The diagram below illustrates the connections between the EMAC and Aurora core and the clock domain crossing FIFOs.

Tutorial Overview

The Virtex-5 Embedded Tri-mode Ethernet MAC is useful for designs requiring Ethernet connectivity. Fortunately, Xilinx has made it easy for us to start developing with the Ethernet MACs by providing several online examples and application notes. One of the examples can be obtained when you use CORE Generator to generate the Ethernet MAC wrapper. The generated example is a simple design that mirrors incoming Ethernet packets, swapping the source and destination MAC addresses. In this tutorial, we implement the example design provided by CORE Generator by working the example code into a custom peripheral for EDK 10.1.

Tutorial Overview

In this tutorial we will create a simple project that uses our own IP peripheral (instead of using the XPS General Purpose IO peripheral provided by Xilinx) to read from the DIP switches and write to the LEDs. The software application will display the DIP switch values on the LED outputs and also send the DIP switch values to the UART.

Any custom logic (IP) that you design must connect to the PLB to communicate with the Microblaze processor. When connected to the PLB, the IP becomes part of the memory map accessible to the Microblaze. The IP will have a base address and a high address signifying where in the memory map it resides, and how much of the memory map it occupies. The Microblaze interacts with the IP as though it were part of the memory.