Tutorial Overview
In this example, we will develop a simple FPGA project using the Base System Builder that includes three peripherals: the RS232 UART and two GPIOs. One GPIO will be used for the DIP switches and the other for the LEDs. We will then use a C program to read data from the switches and write it to the LEDs. The result is that the LEDs will display the DIP switch settings.
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In this tutorial, we will generate an Aurora IP core using the Xilinx CORE Generator version 10.1. The Aurora core can be used as a high-speed serial communications link for connecting multiple FPGAs or interfacing to other serial devices.
Requirements
To generate the Aurora core with CORE Generator, you will first need to register with Xilinx to obtain a license to use the Aurora core. It is a free and simple process that involves accepting a license agreement. To start your registration, follow this link:
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Sometimes we have an .ngc file from CORE Generator (or some other source) that we would like to bring into EDK as a peripheral. This project is a simple example of integrating a blackbox design into a peripheral generated by the Peripheral Wizard. We will first create a blackbox multiplier using the Xilinx CORE Generator and then we will use the generated .ngc file in our peripheral.
Tutorial Overview
This tutorial is similar to the previous one titled: Integrating a Blackbox into a Peripheral however in this case, instead of integrating an .ngc file into a peripheral, we integrate one or more VHDL files. Sometimes we have a VHDL design that we developed in ISE, or some other program, and we would like to bring it into the EDK as a peripheral. In this tutorial, we will create the same multiplier peripheral as was created in the previous tutorial.
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In the previous example, we created a project using the BSB and all of the work related to the hardware design was done by the BSB. In this example, we will create the same simple project, but this time we will add the GPIO for the LEDs manually. This way we will learn the process of adding extra peripherals to our design and we will also better understand the hardware design features of XPS.
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In this example, we will develop a driver for the 16x2 character LCD on the ML505/6/7 board. The LCD driver will be mostly a Microblaze design, as opposed to being an IP design. The physical interface to the LCD will be made through a GPIO peripheral. The signal timing requirements of the LCD will be achieved by using a Timer peripheral. The functions contained in the software application will control what is shown on the LCD. The main function of the software application will provide a simple example of how to clear the display, write a message on the LCD and to change the cursor location.
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The ML505 Evaluation Platform from Xilinx is a development board for the Virtex-5 FPGA. It contains many useful hardware features including:
Below are several frequently asked questions about the ML505/6/7 and XUPV5 boards. Click on the question to jump to the answer. If you have a question about the ML505/6/7 or XUPV5 boards, please contact us at the email address given at the end of this page.
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Tutorial Overview
In this tutorial we will add code to a peripheral template generated by the Peripheral Wizard to create a simple timer. The peripheral will generate an interrupt when the timer expires. The Microblaze will process the interrupt through an interrupt handler function which gets called whenever the interrupt occurs. In this example, we will make the LEDs flash by using the interrupt handler function to switch the state of the LEDs and reset the timer.
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