Multi-port 25G Ethernet on Versal ACAP
A reference design that you can build and test
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Versal™ AI Core XCVC1902-2MSEVSVA2197 Adaptive SoC
The board has a Zynq UltraScale+ device that acts as the system controller. On power up, the system controller reads FRU data on the EEPROM of the connected FMC card, and sets the VADJ voltage accordingly. Supported VADJ voltages are 1.2V and 1.5V.
Boot mode of the Versal device is determined by DIP switch SW1.
Config mode | 1 | 2 | 3 | 4 |
---|---|---|---|---|
JTAG | ON | ON | ON | ON |
QSPI32 | ON | OFF | ON | ON |
SD Card | ON | OFF | OFF | OFF |
The SD card of the Versal is located on the top side of the board, next to the QSFP28 connector.
Boot mode of the Zynq UltraScale+ device (the system controller) is determined by DIP switch SW11.
Config mode | 1 | 2 | 3 | 4 |
---|---|---|---|---|
JTAG | ON | ON | ON | ON |
QSPI32 | ON | OFF | ON | ON |
SD Card | ON | OFF | OFF | OFF |
The SD card of the system controller is located on the bottom side of the board underneath USB connector J308.