FPGA Developer

Over the last few months I’ve been very busy thanks to the popularity of Xilinx’s Zynq SoC. Here’s the latest project I’ve been working on for Evans Analytical Group, a Zynq based controller for high-power burn-in of ASICs. This custom board uses the Zynq XC7Z020 which contains a Dual Core ARM processor plus FPGA programmable logic. With 1GB DDR3 memory, Gigabit Ethernet and an SD memory card, this board is a powerful System-on-Module that can be connected to a carrier card via 3 wide expansion connectors. [Read More]

One of my most common customer requests is to speed up execution of a software application using FPGA hardware acceleration. If the application runs on a PC or server, you can achieve impressive performance gains by using off-the-shelf FPGA development boards for PCI Express. Here is a comparison of the available 7 Series FPGA boards for PCI Express applications: AC701 Artix-7 KC705 Kintex-7 VC707 Virtex-7 VC709 Virtex-7 $1295 $1695 $3495 $4995 XC7A200T-2FBG676C XC7K325T-2FFG900C XC7VX485T-2FFG1761 XC7VX690T-2FFG1761C 4-lane Gen2 PCIe 8-lane Gen2 PCIe 8-lane Gen2 PCIe 8-lane Gen3 PCIe 1GB DDR3 SODIMM 1GB DDR3 SODIMM 1GB DDR3 SODIMM 4GB DDR3 SODIMM x2 8Kb EEPROM 8Kb EEPROM 8Kb EEPROM 1KB EEPROM No BPI Flash 128MB BPI Flash 128MB BPI Flash 32MB BPI Flash 32MB Quad SPI 16MB Quad SPI 16MB Quad SPI No Quad SPI Flash SD Card slot SD Card slot SD Card slot No SD No LPC FMC 1x LPC FMC No LPC FMC No LPC FMC 1x HPC FMC (*) 1x HPC FMC (*) 2 x HPC FMC 1x HPC FMC (*) 1x SFP 1x SFP+ 1x SFP+ 4x SFP/SFP+ 1GB Ethernet 1GB Ethernet 1Gb Ethernet No Ethernet No USB No USB No USB No USB UART over USB UART over USB UART over USB UART over USB HDMI out HDMI out HDMI out No Video XADC header XADC header AMS port No Analog (*) Note: These HPC FMC connectors are only partially populated which means that they wont be able to support all standard FMCs. [Read More]

If you’re interested in testing out the Zynq-7000 SoC from Xilinx there are now quite a few options available, so it comes down to a question of features vs price. Below I’ve listed the most important features of the available boards side-by-side to help you make the right decision for yourself or your company. I’ll also go into what I think of each board before we look at the boards in terms of their popularity. [Read More]

Update 2014-08-06: This tutorial is now available in a Vivado version - Using the AXI DMA in Vivado One of the essential devices for maximizing performance in FPGA designs is the DMA Engine. DMA stands for Direct Memory Access and a DMA engine allows you to transfer data from one part of your system to another. The simplest usage of a DMA would be to transfer data from one part of the memory to another, however a DMA engine can be used to transfer data from any data producer (eg. [Read More]

A while back I started sharing FPGA projects and code on Github. As I typically only commit sources and not generated files, the process of rebuilding the projects from sources can be a little tricky if you’re not used to working with the Xilinx tools. In this post I’ll explain exactly how you can download and rebuild one of my projects, and hopefully it will make the projects useful to more people. [Read More]

In the previous tutorial titled Creating a project using Base System Builder, we used Xilinx Platform Studio (EDK) to create a hardware design (bitstream) for the Zynq SoC. In this tutorial, we will complete the design by writing a software application to run on the ARM processor which is embedded in the Zynq SoC. Using the Xilinx SDK, we’ll create a simple application that will send the words “hello world” out of the serial port and into your PC serial console. [Read More]

I know I’ve gone through the Base System Builder many times before but I’m writing a few more advanced tutorials for version 14.7 and they all need a starting point. So in this post we will use the handy Base System Builder of the Xilinx Platform Studio (EDK) to put together a simple project for the ZC706 evaluation board. Requirements You will need the following : Xilinx ISE Design Suite 14. [Read More]

I ran into a problem on the JTAG boundary scan and after hours of googling and probing with my oscilloscope, I finally came across a solution. Firstly I should say that if you are having a JTAG problem with this board, make sure that your DIP switch settings are right. There are two DIP switches (SW11 and SW4) that should be set correctly for your particular JTAG setup. If you are using a USB cable plugged into the slot labelled “JTAG” on the faceplate of the ZC706, you should use the settings 00000 for SW11 and 01 for SW4. [Read More]

I just received the Zynq-7000 based ZC706 development board from a new client and I’m pretty excited to start working on it. This is the first time that I’ll be working on the Zynq FPGA, part of the latest series 7 devices from Xilinx, so over the next few days, I’ll be writing about my experiences while getting familiar with the board, the FPGA and version 14.5 of the Xilinx development tools. [Read More]

I was looking around for FPGA based PCIe boards when I came across something interesting from Nallatech. They’ve created two OpenCL compatible PCIe boards designed especially for the finance market. Named rather creatively “Nallatech 385” and “Nallatech 395”, they’re both based on the Stratix V from Altera which is the best of Altera’s high-end FPGAs. Both boards have a PCIe Gen3 x 8 lane host interface that should allow you to transfer data between the FPGA and the host machine at about 7. [Read More]