Write a software application with SDK
Posted on June 28, 2011
| Jeff Johnson
In the previous tutorial titled Creating a project using Base System Builder, we used the Embedded Development Kit (EDK) to create a hardware design composed of IP cores and a Microblaze soft processor. In this tutorial, we will complete the design by writing a software application to run on the Microblaze processor. In version 13.1, this is done using the Software Development Kit (SDK) and it is no longer “doable” in the EDK.
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How to keep a signal name after mapping
Posted on June 27, 2011
| Jeff Johnson
Why can’t I find my signals in Chipscope inserter?
Often you want to assign a constraint to a particular signal in your design, or you want be able to find a particular signal in Chipscope inserter. In both cases, the signal must be in the physical design database (ie. in the .NCD file - Native Circuit Description) which is generated by the mapper. Not all signal names in your HDL code will end up in the NCD, some of them will be absorbed into logic blocks and grouped into a different signal name.
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EDK Version 13.1 Navigation
Posted on June 25, 2011
| Jeff Johnson
The diagram below shows the EDK window with an open project. The important areas are labelled with numbers 1 to 6.
1. Project Information This area contains information about the project and contains two tabs: Project and IP Catalog.
The Project tab lists the project files and also some of the project settings such as target FPGA. The IP catalog contains a list of the peripherals or IP cores that your project has access to.
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Don't forget SIGIS = CLK in your MPD files!
Posted on June 23, 2011
| Jeff Johnson
The other day I wasted hours trying to figure out why my peripheral wasn’t properly clocking Chipscope. Basically I had my peripheral generating a clock and data which I plugged directly into a Chipscope ILA peripheral. When I looked at the Chipscope data, it was sort of random but sort of looked right at the same time.
I eventually realized that in my MPD file for the peripheral, I had forgotten to specify that my clock output was in fact a “clock” output by using the SIGIS = CLK parameter.
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FPGA Mezzanine Card (FMC) is a game-changer
Posted on June 23, 2011
| Jeff Johnson
If you’re a hardware developer, you know the problem:
My product integrates the FPGA and ADC on the one compact PCB, but now my customers want a higher-speed ADC, or a DAC, or both. Now I have to take on the risk of designing a whole new board to satisfy that demand. I’m getting killed on repairs because the cost of my field-replacable-unit is too high. Having too many high-cost devices on the same board is just not economical.
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Convert an ML505 EDK project for the XUPV5
Posted on June 19, 2011
| Jeff Johnson
For some reason, the Base System Builder in EDK doesn’t support the XUPV5 board so when making an EDK project for the XUPV5 we have to select the ML505 board and modify the project settings later. If you have not yet created an EDK project, you should read the previous post Creating a project using the Base System Builder, and then continue from these instructions.
Change the target FPGA The ML505 is based on the Virtex-5 XC5VLX50T whereas the XUPV5 is based on the Virtex-5 XC5VLX110T, so the first thing we must do is change the target FPGA of the project.
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Creating a project using the Base System Builder
Posted on June 19, 2011
| Jeff Johnson
What am I learning here? In this post we’ll look at using the Base System Builder in EDK version 13.1. Specifically you’ll learn:
How to create an EDK project with the Base System Builder How to add a software application to an EDK project How to implement and test your design Requirements You will need the following :
One ML505/ML506/ML507 or XUPV5 board (or actually any board supported by Xilinx).
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Big changes are coming!
Posted on June 15, 2011
| Jeff Johnson
Some of you will know that I ran some polls on the site over the last couple of months. Well I checked out the results and accordingly there will be some big changes on the site, the first of which is that I’ve moved to WordPress and given the site a fresh new look.
Thanks to all the people who responded to the polls, your input was very very appreciated! Here are the changes:
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Loading Designs from Compact Flash
Posted on October 12, 2009
| Jeff Johnson
Overview
Your FPGA designs can be copied onto a compact flash card and loaded automatically when your ML50x/XUPV5 board is turned ON. The configuration DIP switch (SW3), located in the top left hand corner of the board, determines which design the FPGA is loaded with when the board is turned ON.
Before understanding how to use these switches, we must first take a look at how the flash disk contents are structured.
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Convert Bit Files to System ACE Files
Posted on October 10, 2009
| Jeff Johnson
Instructions To run your designs from the flash disk, you need to first convert your bit files to System ACE files (.ace). One simple system for doing this is to copy all your bit files to one folder and use a batch file in that folder to perform the conversions from the command line.
To start, you should create a folder and copy your bit file(s) there (eg. “C:SysACE”).
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