zynq - FPGA Developer

Board bring-up: MYIR MYD-Y7Z010 Dev board

Posted on May 4, 2018 | Jeff Johnson

In this tutorial video, I bring-up the 3x Gigabit Ethernet ports on the MYD-Y7Z010 Development board from MYIR. Firstly, I create a Vivado design for this board, then I export it into the SDK and generate the echo server application for each of the 3 ports (note that the echo server application only supports one port at a time). At the end of the video, I test each of these designs on hardware and ensure that the ports are given an IP address via DHCP and that I can ping the port. [Read More]

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Creating a custom AXI-Streaming IP in Vivado

Posted on November 1, 2017 | Jeff Johnson

The AXI-Streaming interface is important for designs that need to process a stream of data, such as samples coming from an ADC, or images coming from a camera. In this tutorial, we go through the steps to create a custom IP in Vivado with both a slave and master AXI-Streaming interface. The custom IP will be written in Verilog and it will simply buffer the incoming data at the slave interface and make it available at the master interface - in other words, it will be a FIFO. [Read More]

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Getting Started with the MYIR Z-turn

Posted on October 18, 2017 | Jeff Johnson

In this video I create a simple Vivado design for the MYIR Z-turn Zynq SoM and we run a hello world application on it, followed by the lwIP echo server. We connect the Z-turn to a network, then we use “ping” and “telnet” to test the echo server from a PC that is connected to the same network. If you want to try it out yourself, download the SD card boot files here: [Read More]

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ZynqBoard: The World's Smallest Zynq SoM

Posted on March 11, 2016 | Jeff Johnson

Almost a year ago I did a comparison of Zynq SoMs, or System-on-Modules, these handy little Zynq-based devices that speed up your product development by taking the risk out of your PCB design and often handing you a ton of working example code. Well there have been many more Zynq SoMs come onto the market since then, so another comparison is due, but today I just wanted to review one of them: ZynqBoard, the smallest Zynq SoM on the market today according to zynqboard. [Read More]

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Creating a Base System for the Zynq in Vivado

Posted on July 31, 2014 | Jeff Johnson

Tutorial Overview In the ISE/EDK tools, we’d use the Base System Builder to generate a base project for a particular hardware platform. Now with Vivado, the process is a little different but we have more control in how things are setup and we still benefit from some powerful automation features. In this tutorial we’ll create a base design for the Zynq in Vivado and we’ll use the MicroZed board as the hardware platform. [Read More]

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Zynq and the trend towards ARM-FPGA architectures

Posted on June 16, 2014 | Jeff Johnson

Since the release of the Series 7 devices from Xilinx in 2011, one member of the family is clearly dominating the others in terms of popularity: the Zynq-7000 SoC. Did Xilinx put all their marketing efforts into the Zynq or is this proof of a new trend in FPGA technology? To answer that question let me talk about why I think the Zynq SoC has been so popular. The Zynq bridges a gap in the market for high-performance, calculation-intensive devices. [Read More]

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Create an application using the Xilinx SDK

Posted on February 27, 2014 | Jeff Johnson

In the previous tutorial titled Creating a project using Base System Builder, we used Xilinx Platform Studio (EDK) to create a hardware design (bitstream) for the Zynq SoC. In this tutorial, we will complete the design by writing a software application to run on the ARM processor which is embedded in the Zynq SoC. Using the Xilinx SDK, we’ll create a simple application that will send the words “hello world” out of the serial port and into your PC serial console. [Read More]

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