High-capacity non-volatile storage is pretty handy in the intensive computing applications that the Versal ACAP adaptive SoCs get employed in. NVMe SSDs are a perfect way to provide that storage because they can directly interface with the Versal’s integrated blocks for PCIe. Those integrated blocks are Gen4 compliant which makes for an extremely high bandwidth connection between the FPGA fabric and the storage medium.
Over the past couple of weeks, my team and I have been bringing up an NVMe SSD on the Versal AI Core VCK190 Evaluation kit using the FPGA Drive FMC Gen4 adapter.
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One of the projects I’ve been working on in the last few months has been upgrading our M2 SSD to FPGA adapter product (FPGA Drive FMC) to support the new Gen4 PCIe SSDs. It’s now available to buy so I thought that I would share some photos and write a bit about the changes that we made. The photos were taken with these two Gen4 PCIe SSDs:
Corsair Force Series MP600 1TB Gen4 PCIe NVMe M.
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I’ve just done a video to demo Intelliprop’s NVMe Host Accelerator IP core on the Xilinx Kintex Ultrascale KCU105 dev board and the Samsung 950 Pro M.2 NVMe SSD. To connect them together I’ve used the FPGA Drive FMC plugged into the HPC connector to give us a 4-lane PCIe Gen3 interface with the SSD. The read/write speeds I got are simply incredible and line up very well with the numbers I wrote about in an earlier post.
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Orders can now be placed for the FPGA Drive products on the Opsero website. Both the PCIe and FMC versions allow you to connect an M.2 PCIe solid-state drive to an FPGA development board and both can be purchased at the same price of $249 USD (solid-state drive not included).
The PCIe version has an 8-lane PCIe edge connector for interfacing with the PCIe blade (aka. goldfingers) of an FPGA development board.
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With FPGA Drive we can connect an NVM Express SSD to an FPGA, but what kind of real-world read and write speeds can we achieve with an FPGA? The answer is: it depends. The R/W speed of an SSD depends as much on the SSD as it does on the system it’s connected to. If I connect my SSD to a 286, I can’t expect to get the same performance as when it’s connected to a Xeon.
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Let me introduce you to Opsero’s latest offering: FPGA Drive FMC, a new FPGA Mezzanine Card that allows you to connect an NVMe PCIe solid-state drive to your FPGA.
There’s got to be a better way. In the past, if you were developing an FPGA based product that needed a large amount of fast non-volatile storage, the best solution was to connect a SATA drive. Physical interfacing was pretty simple because all you needed was one gigabit transceiver.
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Here’s a first look at the FMC version of the FPGA Drive product, featured with the Samsung VNAND 950 Pro SSD. The FMC version can carry M-keyed M.2 modules for PCI Express and is designed to support up to 4-lanes. It has a HPC FMC connector which can be used on a LPC FMC carrier for a single-lane connection to the SSD, or a HPC FMC carrier to exploit the maximum throughput of a 4-lane connection.
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For those of you who were interested in running my recent tutorials about connecting a PCIe SSD to the Zynq (Zynq PCI Express Root Complex design in Vivado and Connecting an SSD to an FPGA running PetaLinux) you’ll be happy to know that Avnet has released the PicoZed FMC Carrier Card V2, which is the platform on which those tutorials were based.
For more information about the new PicoZed carrier, check out their video - and keep an eye out at 1m:32s where the Ethernet FMC gets a mention!
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This is the final part of a three part tutorial series on creating a PCI Express Root Complex design in Vivado and connecting a PCIe NVMe solid-state drive to an FPGA.
Part 1: Microblaze PCI Express Root Complex design in Vivado
Part 2: Zynq PCI Express Root Complex design in Vivado
Part 3: Connecting an SSD to an FPGA running PetaLinux (this tutorial)
In this final part of the tutorial series, we’ll start by testing our hardware with a stand-alone application that will verify the status of the PCIe link and perform enumeration of the PCIe end-points.
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