Xilinx reveals Virtex Ultrascale Board for PCI Express applications
Posted on February 23, 2016
| Jeff Johnson
Xilinx just released a video presenting the next-generation of All Programmable devices and dev environments. It’s a quick look at where technology is going and particularly where FPGAs are going to make their mark.
Of particular interest to me were the images of a Virtex Ultrascale PCI Express board at 2:45 in the video. This board appears to have both the PCIe gold-finger edge connector and a PCIe saddle-mount socket connector, so it could be used as either the PCIe end-point or the root complex - or maybe both at the same time.
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Unboxing Samsung V-NAND SSD 950 Pro M.2 NVM Express
Posted on February 13, 2016
| Jeff Johnson
Very excited to be showing off my new Samsung SSD 950 in the M.2 form factor. This tiny solid-state drive has a PCI Express Gen3 x 4-lane interface for a more direct connection to the CPU which enables a much higher throughput than a SATA interface. According to Samsung:
It outperforms SATA SSDs by over 4.5 times in sequential read and by over 2.5 times in sequential write, delivering the speeds of 2,500 MB/s and 1,500 MB/s respectively.
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PicoZed Unboxing
Posted on January 4, 2016
| Jeff Johnson
I recently got myself a PicoZed 7Z030 SoM (system-on-module) so that I could start developing more resource intensive applications for the Ethernet FMC, such as network tapping and network latency measurement. Why would I use a SoM for this? Checkout my comparison of Zynq SoMs to learn more about the benefits of SoMs in product development.
It’s worth mentioning this arrived the day after I ordered it. Here are some photos I took while unboxing:
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ARTY: The $99 Artix-7 FPGA eval kit
Posted on October 1, 2015
| Jeff Johnson
I just got the news about the new ARTY $99 FPGA evaluation kit being released and I thought it was worth a mention. At the $99 price point and with the Arduino shield connector, they’ll attract a lot of hobbyists who can now hook up one of the many existing Arduino shields to a Series-7 FPGA. Another interesting thing is that it ships with a webserver reference design so you’ve got a head-start on your IoT applications.
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Ethernet gets robust
Posted on July 31, 2015
| Jeff Johnson
Announcing that the Robust Ethernet FMC is now in stock and available for purchase. Checkout the flashy new images of the first units, ravaging Ethernet packets in this tough new form factor.
Back in black
Posted on July 18, 2015
| Jeff Johnson
Here’s a look at a batch of Ethernet FMCs fresh off the production line.
Sneak look at the new Robust Ethernet FMC
Posted on June 10, 2015
| Jeff Johnson
Here are the first images of my new product: the Robust Ethernet FMC.
This new variation of the Ethernet FMC contains all the features of the standard version but has been designed to fit the 10mm height profile of the Vita 57.1 standard. The Robust Ethernet FMC is perfect for the more rugged gigabit Ethernet applications, and here’s why:
4 x 10mm stand-offs positioned to fit the mounting holes of the Vita 57.
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Comparison of Zynq SoMs
Posted on May 18, 2015
| Jeff Johnson
In the last year or so, there has been an explosion in the availability of System-on-Modules (SoMs) featuring the popular FPGA+ARM combo Zynq-7000 SoC from Xilinx. I’ve always promoted the idea that FPGAs and SoCs allow for faster design cycles and rapid proof-of-concept, but these SoMs take that advantage to another level. Let me explain why. In the past, I would handle most projects by doing a proof-of-concept on an evaluation board, then designing a custom board that integrates all the required components onto a single PCB.
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1.8V Version Ethernet FMC now available
Posted on April 16, 2015
| Jeff Johnson
I recently received and tested the first 1.8V Ethernet FMCs and they are now available to buy on ethernetfmc.com. There are two main reasons why you’d actually want a 1.8V version: Firstly, some carriers only support VADJ of 1.8V (such as the VC707 and VC709). Secondly, some customers need to match it with another 1.8V FMC on a dual-FMC carrier.
Releasing the new version didn’t come without headaches. Most FMC carriers on the market have a 2.
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Ethernet FMC performance benchmarks released
Posted on January 15, 2015
| Jeff Johnson
One question I get a lot about the Ethernet FMC is: What is the maximum throughput? It’s a good question, so I created an example design to help me get the answer. The maximum throughput test design, that you can download on Github, uses four hardware packet generators (coded in VHDL) to feed the Ethernet MACs with back-to-back packets. These packets then get sent out of the Ethernet ports and get looped back into another Ethernet port through a CAT-5 cable.
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