In the previous post we setup the Kria KV260 Vision AI Starter Kit for PYNQ under Ubuntu 20.04.3. Now we would like to update our Kria SoMs boot firmware so that we can boot the newer Ubuntu 22.04 and use the latest PYNQ release for Kria. In this post we’ll go through the steps for updating the boot firmware of your Kria SoM.
Just for clarity, the table below shows the Kria Ubuntu images that are currently available and the version of boot firmware that is required to boot them.
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In this post we’re going to setup the Kria KV260 Vision AI Starter Kit for use with PYNQ. For other platforms like the PYNQ-Z1, the PYNQ setup is quite simple: we download a disk image file for the version of PYNQ that we want to use and we just burn that image onto our SD card. For the Kria, it’s a bit different and unfortunately it’s a bit more complicated, at least it is at the moment I write this post.
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In this post we’re going to setup a virtual machine with the tools for building PYNQ and we are going to build PYNQ release v2.6 (tool version 2020.1) for the Ultra96 board. We’re going to start with the virtual machine that we setup in the previous post How to Install PetaLinux 2020.1. That VM has Vitis 2020.1 and PetaLinux 2020.1 installed, both of which we will need to build PYNQ. If you want to avoid issues along the way, I highly recommend that you follow that post and recreate the same VM with exactly the same tool versions and OS.
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In this post we’re going to build an SD image for PYNQ release v2.5 (tool version 2019.1) for the Ultra96 board. The starting point will be the virtual machine that we setup in an earlier post How to Install PetaLinux 2019.1. In that post we installed Vivado & SDK 2019.1 and PetaLinux 2019.1 on the VM, and we’ll need all three of them to build the PYNQ SD image. I highly recommend that you follow that post and recreate exact same VM to avoid any issues going through this post.
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The Intel Movidius Neural Compute Stick (NCS) is a neural network computation engine in a USB stick form factor. It’s based on the Myriad-2 chip, referred to by Movidius as a VPU or Visual Processing Unit, basically a processor that was specifically designed to accelerate neural network computations, and with relatively low power requirements. The NCS is a great match for single board computers like the Raspberry Pi, the Beagle Bone and especially the PYNQ-Z1.
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PYNQ enables huge productivity gains by making it possible to program the Zynq-7000 SoC with a high-level programming language (Python) and leverage the power of FPGA hardware acceleration with ease. Xilinx first designed PYNQ to target the PYNQ-Z1 board but it wasn’t long before others saw the potential of running PYNQ on other platforms. This post is a list of open-sourced PYNQ projects and ports that run on other platforms. I’ll keep the list up-to-date but if you know of an open-sourced PYNQ project or port that I haven’t found yet, please let me know and I’ll add it to the list.
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See what the PYNQ-Z1 and the PYNQ Computer Vision overlay are capable of doing with a 720p standard HD video stream. In the video we run a 2D filter and dilate function on the incoming video, first using the Python OpenCV functions (ie. without hardware acceleration), then we test it again with the accelerator IPs running on the FPGA. Without acceleration, we get a frame rate of 5 frames per second.
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This video demonstrates how you would typically go about accelerating a Python function or algorithm on the Zynq-7000 with PYNQ. The function I chose to base this video on is the Finite Impulse Response (FIR) filter because the SciPy package contains the lfilter function which can be used for this purpose, and because the Xilinx IP catalog has a free FIR filter IP core. If you instead wanted to implement the accelerator in HLS, the process would be very similar, you would just have to design your accelerator with AXI-Streaming interfaces and ensure that the TLAST signals were properly managed.
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In this video tutorial we create a custom PYNQ overlay for the PYNQ-Z1 board. Probably the simplest PYNQ overlay possible, it contains one custom IP (an adder) with an AXI-Lite interface and three registers accessible over that interface: a, b and c. To use the IP we write a number to input registers a and b, and then we read the output register c which contains the sum of a and b.
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Being a big fan of Python, for ages I’ve wanted to explore the possibilities of running Python on the Zynq. Thankfully Xilinx and Digilent saw the value in this too and they developed the PYNQ-Z1 and more importantly the PYNQ libraries for Python. The PYNQ-Z1 is basically a single board computer based on the Zynq-7020 device from Xilinx. So thats got a dual core ARM plus integrated FPGA or programmable logic.
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