Measuring the speed of an NVMe PCIe SSD in PetaLinux
Posted on July 2, 2016
| Jeff Johnson
With FPGA Drive we can connect an NVM Express SSD to an FPGA, but what kind of real-world read and write speeds can we achieve with an FPGA? The answer is: it depends. The R/W speed of an SSD depends as much on the SSD as it does on the system it’s connected to. If I connect my SSD to a 286, I can’t expect to get the same performance as when it’s connected to a Xeon.
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At last! Affordable and fast, non-volatile storage for FPGAs
Posted on July 1, 2016
| Jeff Johnson
Let me introduce you to Opsero’s latest offering: FPGA Drive FMC, a new FPGA Mezzanine Card that allows you to connect an NVMe PCIe solid-state drive to your FPGA.
There’s got to be a better way. In the past, if you were developing an FPGA based product that needed a large amount of fast non-volatile storage, the best solution was to connect a SATA drive. Physical interfacing was pretty simple because all you needed was one gigabit transceiver.
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FMC for Connecting an SSD to an FPGA
Posted on June 8, 2016
| Jeff Johnson
Here’s a first look at the FMC version of the FPGA Drive product, featured with the Samsung VNAND 950 Pro SSD. The FMC version can carry M-keyed M.2 modules for PCI Express and is designed to support up to 4-lanes. It has a HPC FMC connector which can be used on a LPC FMC carrier for a single-lane connection to the SSD, or a HPC FMC carrier to exploit the maximum throughput of a 4-lane connection.
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Connecting an SSD to an FPGA running PetaLinux
Posted on April 15, 2016
| Jeff Johnson
This is the final part of a three part tutorial series on creating a PCI Express Root Complex design in Vivado and connecting a PCIe NVMe solid-state drive to an FPGA.
Part 1: Microblaze PCI Express Root Complex design in Vivado
Part 2: Zynq PCI Express Root Complex design in Vivado
Part 3: Connecting an SSD to an FPGA running PetaLinux (this tutorial)
In this final part of the tutorial series, we’ll start by testing our hardware with a stand-alone application that will verify the status of the PCIe link and perform enumeration of the PCIe end-points.
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Zynq PCI Express Root Complex design in Vivado
Posted on April 14, 2016
| Jeff Johnson
This is the second part of a three part tutorial series in which we will create a PCI Express Root Complex design in Vivado with the goal of connecting a PCIe NVMe solid-state drive to our FPGA.
Part 1: Microblaze PCI Express Root Complex design in Vivado
Part 2: Zynq PCI Express Root Complex design in Vivado (this tutorial)
Part 3: Connecting an SSD to an FPGA running PetaLinux
In this second part of the tutorial series, we will build a Zynq based design targeting the PicoZed 7Z030 and PicoZed FMC Carrier Card V2.
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Microblaze PCI Express Root Complex design in Vivado
Posted on April 13, 2016
| Jeff Johnson
This is the first part of a three part tutorial series in which we will go through the steps to create a PCI Express Root Complex design in Vivado, with the goal of being able to connect a PCIe end-point to our FPGA. We will test the design on hardware by connecting a PCIe NVMe solid-state drive to our FPGA using the FPGA Drive adapter.
Part 1: Microblaze PCI Express Root Complex design in Vivado (this tutorial)
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FPGA Drive Board Bring-up
Posted on March 31, 2016
| Jeff Johnson
Bring-up of the first FPGA Drive with the Kintex-7 KC705 Evaluation board went nice and smoothly today. In the photo below you’ll see the KC705 and FPGA Drive adapter which is loaded with a Samsung V-NAND 950 Pro. The solid-state drive is an M.2 form factor, NVM Express, 4-lane PCI Express drive with 256GB of storage.
A little intro to NVM Express. NVM Express or NVMe is an interfacing specification for accessing SSDs over a PCI Express bus.
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A first peek at FPGA Drive
Posted on March 15, 2016
| Jeff Johnson
With the first prototypes on the way, it’s time to take a closer look at what exactly FPGA Drive is and how it can help you to develop new disruptive technologies with FPGAs and SSDs. Here’s what you need to know in 3 points:
FPGA Drive enables you to connect a high-speed Solid State Drive (SSD) to an FPGA FPGA Drive delivers high-capacity, extreme-throughput non-volatile storage to FPGA development boards FPGA Drive connects a 4-lane PCI Express bus between your FPGA and SSD The 3D rendered image shows the following key features:
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Unboxing Samsung V-NAND SSD 950 Pro M.2 NVM Express
Posted on February 13, 2016
| Jeff Johnson
Very excited to be showing off my new Samsung SSD 950 in the M.2 form factor. This tiny solid-state drive has a PCI Express Gen3 x 4-lane interface for a more direct connection to the CPU which enables a much higher throughput than a SATA interface. According to Samsung:
It outperforms SATA SSDs by over 4.5 times in sequential read and by over 2.5 times in sequential write, delivering the speeds of 2,500 MB/s and 1,500 MB/s respectively.
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